Verilog HDL Programming Lab (ECE-612)
Program: B.Tech Electronics & Communication Engineering
Category: Professional Core Course
Semester: 6
Credits: 1
L-T-P: 0- 0- 2
Description
Instructor

Dr. Sarabdeep Singh Bijral

Associate Professor
Department Of Electronics & Communication Engineering
Course Outcomes
  • Develop design flow for the given application using VLSI tools
  • Interpret CMOS technology circuits with their specifications.
  • Use relevant Verilog HDL model for given application.
  • Analyze Verilog HDL program for the given circuits.
  • Implement the combinational & sequential logic circuits using Verilog HDL.
Resources
Course Handout Lesson Plan Syllabus
Evaluation Scheme
Continuous Evaluation_1 30
Lab Exam_1 10
Attendance_1 10
Total Internal 50
Total External 0
Overall Total 50